alpine 3.6
obsolete weakness #69

1

Weakness Breakdown


Definition:

An obsolete weakness occurs when someone uses deprecated or obsolete functions when building a system. As a programming language evolves, some functions occasionally become obsolete.

Warning code(s):

This C routine is considered obsolete.

File Name:

xf86-video-i128/src/xf86-video-i128-1.3.6/src/i128init.c

Context:

The highlighted line of code below is the trigger point of this particular Alpine 3.6 obsolete weakness.

 		   (pI128->RamdacType == SILVER_HAMMER_DAC)) {
		CARD32 i;

		if (pI128->Debug) {
			unsigned long tmp1 = inl(iR->iobase + 0x1C);
			unsigned long tmp2 = inl(iR->iobase + 0x20);
       	 	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "I128RestoreState restoring, config1/2 = 0x%lx/0x%lx\n", tmp1, tmp2);
			I128DumpActiveRegisters(pScrn);
		}

		for (i=0; i<0x94; i++) {
			if ((i == IBMRGB_sysclk_vco_div) ||
			    (i == IBMRGB_sysclk_ref_div))
				continue;
			pI128->mem.rbase_g[IDXL_I] = i;			MB;
			pI128->mem.rbase_g[DATA_I] = iR->IBMRGB[i];	MB;
		}

   		pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div;	MB;
   		pI128->mem.rbase_g[DATA_I] =
			iR->IBMRGB[IBMRGB_sysclk_ref_div];		MB;
   		pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div;	MB;
   		pI128->mem.rbase_g[DATA_I] =
			iR->IBMRGB[IBMRGB_sysclk_vco_div];		MB;
		usleep(50000);
	}

	/* iobase is filled in during the device probe (as well as config 1&2)*/

	if (((pI128->io.id&0x7) > 0) ||
	    (pI128->Chipset == PCI_CHIP_I128_T2R) ||
	    (pI128->Chipset == PCI_CHIP_I128_T2R4)) {
		outl(iR->iobase + 0x30, iR->vga_ctl);
	}

	I128RestorePalette(pI128);

	pI128->mem.rbase_w[MW0_CTRL] = iR->i128_base_w[MW0_CTRL]; /*  0x0000  */
	pI128->mem.rbase_w[MW0_SZ]   = iR->i128_base_w[MW0_SZ];   /*  0x0008  */
	pI128->mem.rbase_w[MW0_PGE]  = iR->i128_base_w[MW0_PGE];  /*  0x000C  */
	pI128->mem.rbase_w[MW0_ORG]  = iR->i128_base_w[MW0_ORG];  /*  0x0010  */
	pI128->mem.rbase_w[MW0_MSRC] = iR->i128_base_w[MW0_MSRC]; /*  0x0018  */
	pI128->mem.rbase_w[MW0_WKEY] = iR->i128_base_w[MW0_WKEY]; /*  0x001C  */
	pI128->mem.rbase_w[MW0_KDAT] = iR->i128_base_w[MW0_KDAT]; /*  0x0020  */
	pI128->mem.rbase_w[MW0_MASK] = iR->i128_base_w[MW0_MASK]; /*  0x0024  */
									MB;

	pI128->mem.rbase_g[INT_VCNT] = iR->i128_base_g[INT_VCNT]; /*  0x0020  */
	pI128->mem.rbase_g[INT_HCNT] = iR->i128_base_g[INT_HCNT]; /*  0x0024  */
	pI128->mem.rbase_g[DB_ADR]   = iR->i128_base_g[DB_ADR];   /*  0x0028  */ 

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